000			01815nam a2200241Ia 4500
003			NULRC
005			20250520100601.0
008			250520s9999 xx 000 0 und d
020			_a9780470060704
040			_cNULRC
050			_aTK 7888.3 .M56 2008
100			_aMinns, Peter _eauthor
245		0	_aFSM-based digital design using Verilog HDL / _cPeter D. Minns and Ian D. Elliott
260			_aEngland : _bJohn Wiley & Son, Inc., _cc2008
300			_axiii, 391 pages : _billustrations ; _c25 cm.
365			_bPHP9900
504			_aIncludes index.
505			_aIntroduction to Finite-State Machines and State Diagrams for the Design of Electronic Circuits and Systems -- Using State Diagrams to Control External Hardware Subsystems -- Synthesizing Hardware from a State Diagram -- Synchronous Finite-State Machine Designs -- One Hot Technique in Finite-State Machine Design -- Introduction to Verilog HDL -- Elements of Verilog HDL -- Describing Combinational and Sequential Logic using Verilog HDL -- Asynchronous Finite-State Machines -- Introduction to Petri Nets
520			_aAs digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (including motor control, and signal and serial data identification to name a few) and they use less logic than their alternatives, leading to the development of faster digital hardware systems. This clear and logical book presents a range of novel techniques for the rapid and reliable design of digit.
650			_aVERILOG (COMPUTER HARDWARE DESCRIPTION LANGUAGE)
700			_aElliot, Ian D. _eco-author
942			_2lcc _cBK
999			_c8630 _d8630