MARC details
000 -LEADER |
fixed length control field |
02796nam a2200241Ia 4500 |
003 - CONTROL NUMBER IDENTIFIER |
control field |
NULRC |
005 - DATE AND TIME OF LATEST TRANSACTION |
control field |
20250520100608.0 |
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
fixed length control field |
250520s9999 xx 000 0 und d |
020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
International Standard Book Number |
9780273769194 |
040 ## - CATALOGING SOURCE |
Transcribing agency |
NULRC |
050 ## - LIBRARY OF CONGRESS CALL NUMBER |
Classification number |
QA 76.9.C643 .S73 2013 |
100 ## - MAIN ENTRY--PERSONAL NAME |
Personal name |
Stallings, William. |
Relator term |
author |
245 #0 - TITLE STATEMENT |
Title |
Computer organization and architecture : |
Remainder of title |
designing for performance / |
Statement of responsibility, etc. |
William Stallings ; International edition contributions by R. Mohan. |
250 ## - EDITION STATEMENT |
Edition statement |
Ninth edition. | International edition. |
260 ## - PUBLICATION, DISTRIBUTION, ETC. |
Place of publication, distribution, etc. |
Boston, Massachusetts : |
Name of publisher, distributor, etc. |
Pearson Education, |
Date of publication, distribution, etc. |
c2013 |
300 ## - PHYSICAL DESCRIPTION |
Extent |
786 pages : |
Other physical details |
illustrations ; |
Dimensions |
24 cm. |
365 ## - TRADE PRICE |
Price amount |
USD86.58 |
504 ## - BIBLIOGRAPHY, ETC. NOTE |
Bibliography, etc. note |
Includes bibliographical references (pages 755-766) and index. |
505 ## - FORMATTED CONTENTS NOTE |
Formatted contents note |
Chapter 0. Reader╩╣s and Instructor╩╣s Guide -- Part One. Overview. Chapter 1. Introduction -- Chapter 2. Computer evolution and performance -- Part Two. Computer system. Chapter 3. Top-level view of computer function and interconnection -- Chapter 4. Cache memory -- Chapter 5. Internal memory -- Chapter 6. External Memory -- Chapter 7. Input/Output -- Chapter 8. Operating System Support -- Part three. Arithmetic and Logic -- Chapter 9. number systems -- Chapter 10. Computer arithmetic -- Chapter 11. Digital logic -- Part Four. Central processing unit -- Chapter 12. Instruction sets: characteristics and functions -- Chapter 13. Instruction sets: addressing modes and formats -- Chapter 14. Processor structure and function -- Chapter 15. Reduced instruction set computers -- Chapter 16. Instruction-level parallelism and superscalar processors -- Part Five. Parallel organization. Chapter 17. Parallel processing -- Chapter 18. Multicore computers -- Part Six. Control unit 19-1. Chapter 19. Control unit operation 19-1 -- Chapter 20. Microprogrammed control 20-1. |
520 ## - SUMMARY, ETC. |
Summary, etc. |
Emphasising both fundamental principles and the critical role of performance in driving computer design, this book provides a comprehensive presentation of the organisation and architecture of modern computers. For undergraduates and professionals in computer science, computer engineering, and electrical engineering courses. Learn the fundamentals of processor and computer design from the newest edition of this award-winning text. Four-time winner of the best Computer Science and Engineering textbook of the year award from the Textbook and Academic Authors Association, Computer Organization and Architecture: Designing for Performance provides a thorough discussion of the fundamentals of computer organization and architecture, covering not just processor design, but memory, I/O, and parallel systems.Coverage is supported by a wealth of concrete examples emphasizing modern systems. |
650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM |
Topical term or geographic name entry element |
COMPUTER ORGANIZATION |
942 ## - ADDED ENTRY ELEMENTS (KOHA) |
Source of classification or shelving scheme |
Library of Congress Classification |
Koha item type |
Books |