Fundamentals of digital logic with Verilog design / (Record no. 11980)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01195nam a2200229Ia 4500 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | NULRC |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20250520100714.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 250520s9999 xx 000 0 und d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9780073380544 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | NULRC |
| 050 ## - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK 7868.L6 .B76 2014 |
| 100 ## - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Brown, Stephen |
| Relator term | author |
| 245 #0 - TITLE STATEMENT | |
| Title | Fundamentals of digital logic with Verilog design / |
| Statement of responsibility, etc. | Stephen Brown and Zvonko G Vranesic |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New York, NY : |
| Name of publisher, distributor, etc. | McGraw Hill Education, |
| Date of publication, distribution, etc. | c2014 |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xvi, 847 pages : |
| Other physical details | illustrations ; |
| Dimensions | 24 cm. |
| 365 ## - TRADE PRICE | |
| Price amount | USD177.48 |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Includes index. |
| 505 ## - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Chapter 1 Introduction Chapter 2 Introduction to Logic Circuits Chapter 3 Number Representation and Arithmetic Circuits Chapter 4 Combinational-Circuit Building Blocks Chapter 5 Flip-Flop, Registers, and Counters Chapter 6 Synchronous Sequential Circuits Chapter 7 Digital System Design Chapter 8 Optimized Implementation of Logic Functions Chapter 9 Asynchronous Sequential Circuits Chapter 10 Computer Aided Design Tools Chapter 11 Testing of Logic Circuits |
| 650 ## - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Logic circuits -- Design and construction -- Data processing |
| 700 ## - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Vranesic, Zvonko |
| Relator term | co-author |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Library of Congress Classification |
| Koha item type | Books |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Collection | Home library | Current library | Shelving location | Date acquired | Source of acquisition | Cost, normal purchase price | Total checkouts | Full call number | Barcode | Date last seen | Copy number | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Library of Congress Classification | Civil Engineering | LRC - Main | National University - Manila | General Circulation | 06/30/2015 | Purchased - Amazon | 177.48 | GC TK 7868.L6 .B76 2014 | NULIB000009739 | 05/20/2025 | c.1 | 05/20/2025 | Books |